Dft Verification Engineer

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Job Description

Minimum of 5+ years experience in the area of ASIC/DFT

-In depth knowledge of DFT concepts

-In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis

-Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations

-Expertise in scripting languages such as perl, shell, etc.

-Experience in simulating test vectors

-Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (Tessent, TK, TetraMax)

-Working experience in Genus, Synopsys TetraMax/DFTMax and Cadence Encounter Test is a plus

-Ability to work in an international team, dynamic environment

-Ability to learn and adapt to new tools and methodologies.

-Ability to do multi-tasking & work on several high priority designs in parallel.

-Excellent problem solving skills

-Excellent communication and team work skills and good English is require