Physical Design Engineer II (Silicon Engineering)

📋 Description Perform synthesis, floorplanning, P/G grid, and timing signoff. Develop/improve PD methods and automation scripts. Collaborate with ASIC design to study feasibility and tradeoffs. Resolve timing/congestion issues and drive execution. Run and fix STA, noise, and physical verification signoff. 🎯 Requirements Experience with industry-standard EDA tools; scripting (Python/TCL). Knowledge of deep sub-micron FinFET/CMOS physics. Understanding of CMOS digital design principles and standard cells. Understanding CMOS power dissipation in deep submicron processes. Familiar with CMOS analog circuit and physical design. Basic knowledge of DFT/Scan/MBIST/LBIST and their impact on PD flows. 🎁 Benefits Stock options and long-term incentives. Medical, vision, and dental coverage. 401(k) retirement plan. Disability and life insurance. Paid parental leave. Paid time off: vacation, holidays, sick leave.