Key Takeaways

  • 75% of U.S. employers use automated applicant tracking systems to screen resumes before a human reviews them (Harvard Business School & Accenture, 2021)
  • The most common ATS failures are missing keywords, incompatible formatting, and incorrect file types
  • ResumeGeni scores your resume across 8 parsing layers — modeled on the same steps enterprise ATS platforms like Workday, Greenhouse, and Taleo use to evaluate candidates

How ATS Resume Scoring Works

Applicant tracking systems parse your resume into structured data — extracting your name, contact info, work history, skills, and education — then score how well that data matches the job requirements. Many ATS rejections happen because the parser couldn't extract critical fields, not because the candidate wasn't qualified.

LayerWhat It ChecksWhy It Matters
Document extractionFile format, encoding, readabilityCorrupted or image-only PDFs fail immediately
Layout analysisTables, columns, headers, footersMulti-column layouts break field extraction
Section detectionExperience, education, skills headingsNon-standard headings cause sections to be missed
Field mappingName, email, phone, dates, titlesMissing contact info is a common cause of immediate rejection
Keyword matchingJob-specific terms, skills, certificationsKeyword overlap affects recruiter search visibility and ATS scoring
Chronology checkDate ordering, gap detectionReverse-chronological order is expected by most ATS
QuantificationMetrics, numbers, measurable outcomesQuantified achievements help human reviewers and some scoring models
Confidence scoringOverall parse quality and completenessLow-confidence parses get deprioritized in results

Frequently Asked Questions

Is ResumeGeni free?
Yes. ResumeGeni is currently in beta — ATS analysis, scoring, and initial improvement suggestions are free with no signup required. Full guidance and saved reports may require a free account.
What file formats are supported?
PDF, DOCX, DOC, TXT, RTF, ODT, and Apple Pages. PDF and DOCX are recommended for best ATS compatibility.
How is the ATS score calculated?
Your resume is processed through an 8-layer parsing pipeline that extracts structured data the same way enterprise ATS platforms do. The score reflects how completely and accurately your resume can be parsed, plus how well your content matches common ATS ranking criteria.
Can ATS read PDF resumes?
Yes, but not all PDFs are equal. Text-based PDFs parse well. Image-only PDFs (scanned documents) and PDFs with complex tables or multi-column layouts often fail ATS parsing. Our analyzer will flag these issues.
How do I improve my ATS score?
Focus on three areas: use a clean single-column format, include keywords from the job description naturally in your experience bullets, and ensure all sections (contact, experience, education, skills) use standard headings.

ATS Guides & Resources

Built by engineers with 12 years of experience building enterprise hiring technology at ZipRecruiter. Last updated .

Principal Analog Design Engineer

Neurophos · Austin, Texas

About Neurophos

The demand for new datacenters and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck isn’t about bigger chips or more of them; it means rethinking the fundamental architecture. The industry's current path isn’t going to meet the need, so we took a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years.

Join us and shape the future of computing!

Position Overview:

We are seeking a seasoned Principal Analog Design Engineer to play a vital role in developing cutting-edge full-custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. You will be responsible for the full lifecycle of analog blocks, from specification and architecture down to tape-out-ready layout. Success in this role requires a deep understanding of transistor-level circuit design, linearity, noise performance, and signal integrity in CMOS processes up to GHz speeds. If you possess a proven track record of designing robust, ultra-fast analog circuits and are eager to work at the intersection of electronics and photonics, you will make a defining impact on the future of optical computing.

Location: Austin, TX. Full-time onsite position.

Key Responsibilities:

  • Design, simulate, and verify high-speed analog circuits, such as drivers and transimpedance amplifiers, in deep sub-micron CMOS technologies.

  • Define architecture and specifications for electronic blocks based on system-level requirements.

  • Perform full-custom schematic capture, advanced analog simulations, and complete physical layout, including DRC/LVS, of critical analog blocks using Cadence Virtuoso.

  • Ensure rigorous signal integrity and power integrity across all high-speed interconnects.

  • Conduct post-layout extraction and simulation to validate performance against parasitic effects.

  • Collaborate closely with the Photonics and Digital teams to optimize the electro-optic interface, maximizing performance across the combination of disciplines.

Qualifications:

  • Degree: MS or PhD in Electrical Engineering.

  • Experience: 10+ years of professional experience in full-custom analog integrated circuit design, 5+ years of dedicated experience in either GHz-speed RF or GHz-speed broadband analog design.

  • Technical Proficiency: Demonstrated expert proficiency in the Cadence tool suite, specifically Virtuoso schematic, simulation, and custom layout.

  • Deep understanding of semiconductor device physics, linearity, noise analysis, and high-frequency circuit theory.

  • Proven track record of taking high-speed analog blocks from concept to mass production (successful tape-outs).

Preferred Skills:

  • A background in photonic transceivers or optical communication electronics (e.g., experience with drivers for modulators, TIAs for photodetectors

  • Experience designing high-speed power amplifiers (PAs).

  • Proficiency in electromagnetic simulation tools such as EMX or HFSS.

  • Experience with frequency domain simulation in Spectre RF.

What We Offer

This is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on a game-changing technology at the intersection of photonics and AI as part of a collaborative and brilliant team. You’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.

Benefits

Join a team that invests in your future and your well-being. At Neurophos, we offer:

  • 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.

  • Unlimited PTO. No rigid vacation banks, just a focus on delivery.

  • 401(k) matching and stock option opportunities to ensure our success is your success.

  • Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.

  • Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don’t.